This invention is related to graphics computers that process images to draw graphics data such as characters and graphic elements, and image data processing systems or graphics computers that use such an image processor. Especially, this invention is related to an image data processing system that expands and processes binary data, including characters, symbols, etc. in a low-price and compact graphics computer, as well as to a memory configuration and control method to shorten the drawing time.
The graphics computer that stores character codes and graphic elements and draws, displays, or prints out graphics data on the basis of such character codes and graphic elements uses frame buffers to store the graphic data corresponding to pixels to be displayed on a screen (hereafter, to be referred to as pixel data).
When drawing graphics data, drawing processings and display processings are needed. The drawing processing includes computing pixel positions and pixel data itself from character codes and graphic elements and writing the pixel data in a frame buffer according to the pixel positions. The display processing includes repetitive and sequential reading of pixel data from the frame buffer corresponding to the pixels displayed on the screen synchronously with the raster scanning in the display device to display stable images on the screen.
In this section, the conventional technology related to display data will be explained first. In order to reduce the price of a graphics computer, a well-known method involves adopting a configuration in which a frame buffer is arranged in a large capacity main memory. Such a technique is disclosed as part of the graphics processing system described in Japanese Patent Laid-Open No. 84192/1992, and by the display architecture designed by Robert P. Colwell and described in xe2x80x9cIEEE 1st International Conference on Computer Workstationxe2x80x9d, (pp.30-37) (November, 1985), which is a scientific journal published in the United States. In those devices, a high access mode for a DRAM, etc. is used as a memory for the display, reducing the display processing load. In other words, the horizontal direction of the frame buffer is aligned with the direction of the column addresses in the DRAM, etc.
When drawing pixel data, however, accesses to addresses of different rows are often obtained in the frame buffer even for continuous pixels in the 2-dimensional coordinate system. For example, when drawing a line which is almost vertical, the access addresses are separated from each other by as much as the width of the frame buffer horizontal memory even when they are adjacent in the 2-dimensional coordinate system. At present, the main current of the display format for personal computers is 640 pixels in the horizontal direction by 480 pixels in the vertical direction, and one byte is assigned per pixel, but the number of bytes per pixel is changed now to 4 bytes. In other words, the horizontal memory width is 640 bytes or 2560 bytes. The column address width for a DRAM, etc. is 1 KB to 4 KB. Since both are almost the same in size, addresses of different rows are often accessed for the vertical two consecutive pixels. The high speed access mode is effective only for accessing addresses of the same row. The conventional technology may not be enough therefore to speed up the access satisfactorily for drawing. (1st conventional technology)
As for the line drawing method among drawing processings, a method to find an equation to represent a line between two points from two coordinate points and find a coordinate point between the two points using an equation is described on pages 443 to 446 in xe2x80x9cComputer Graphicsxe2x80x9d (published in 1984) written by James D. Foly and Andries Van Dam, and translated by Atsumi Imamiya. (2nd conventional technology)
An embodiment of a high speed line drawing system is also described in Japanese Patent Laid-Open No. 200087/1982. (3rd conventional technology) According to this system, coordinates for drawing are found by reading the vector data represented by the increment of the Y coordinate when the X coordinate is increased by one. The vector data is expanded to dots beforehand and the result is stored in a vector data storage, and storing addresses are computed from the coordinates of start and end points. Another method is also described in Japanese Patent Laid-Open No. 200087/1982. According to this method, vector data is expanded to dots beforehand and then stored in the vector data storage, and storing addresses are computed from the coordinates of start and end points. The coordinates for drawing are then found by reading the vector data represented by the increment of the Y coordinate when the X coordinate is increased by one.
An embodiment of a character drawing system is described in xe2x80x9cHD64410 ARTOP Users Manualxe2x80x9d (pages 194 to 199) (4th conventional technology). The system draws pixel data in the frame buffer by expanding binary data, such as characters, to multivalue data.
In the above-referenced publication, expansion of binary data represented by xe2x80x9c0xe2x80x9d and xe2x80x9c1xe2x80x9d in the format of 16xc3x9716 bits, as shown in FIG. 2 therein, to multivalue data is described. This binary data, for example, means character and symbol data (hereafter, to be referred to as character data). A set of such character data is stored in a character generator ROM (CGROM). A character code is assigned to each character and character data is accessed with those character codes.
Therefore, the addresses of the character data, corresponding to the character codes and stored in a memory, can be found by computing numerals according to the characteristics of the arrangement of characters. The correspondence of the character data to such memory addresses may be considered to be represented by a coordinate system comprising 16 pixels in the X direction and 16 pixels in the Y direction, and assuming the point that has row number 1 and column number 1 as the origin, as shown in FIG. 2.
Expansion of binary data to multivalue data is performed by converting character data, represented by k binary data and the addresses of the character data in the CGROM, to multivalue (colored and multigraded) data and its addresses in the frame buffer.
The 5th conventional technology is a method for high speed drawing, which includes binary data mask processings. The method is described in Japanese Patent Laid-Open No. 135162/1993 xe2x80x9cImage Processing Systemxe2x80x9d.
This conventional technology is related to expansion of binary data to multivalue data and to using multi-colors for display. The method is a little different in handling color elements from the drawing technology mentioned here.
In other words, since RGB color elements are taken into account for display, one pixel comprises 3 elements and more data is handled. As a result, processings become more complex than those of the basic technology for multivalue expansion.
In this invention, however, the same concept as the multivalue expansion to be performed for drawing can be assumed by considering the technology as applied to one color element.
This invention is featured by using a RAM to store multivalue data corresponding to xe2x80x9c1xe2x80x9d in binary data. In this RAM is stored expanded data for plural pixels. With this, plural pixels can be processed concurrently to speed up the expansion processing.
The multivalue expansion processing is carried out by masking the multivalue data for the number of pixels stored in the RAM corresponding to xe2x80x9c0xe2x80x9d in binary data.
According to the 1st conventional technology, the access to the frame buffer is often for addresses of different rows in memory. And, the high speed memory access mode is allowed only within the addresses of the same row. Therefore, the access time may not be speeded up enough for drawing pixel data in the same conventional technology.
According to the 2nd conventional technology, no sufficient consideration is given to line length for drawing, and equations to compute coordinate points must be found regardless of the line length. The processing to find the equation so compute these coordinate points must be programmed using combinations of many instructions.
Therefore, when drawing a short line, the processing time to compute those equation becomes longer than the drawing time. Furthermore, according to the 3rd conventional technology, the technology is effective to draw a line at high speeds, but the vector data capacity is not considered sufficiently. Thus, a problem arises from the vector data storage capacity, of which more is needed.
According to the 4th conventional technology, every pixel data for a character code is expanded to multivalue data individually. This is why it is impossible to process pixel data at high speeds.
In the speeding-up method of the 5th conventional technology, the data corresponding to xe2x80x9c0xe2x80x9d in binary data is always masked and it is not converted to a specific color. The method cannot cope with draw processings without mask processing, and it cannot draw the background of a character, as shown in FIG. 5.
If, when this speeding-up method is applied to a system that uses a CPU, memory access is restricted for writing the result of concurrently expanded plural pixels in the frame buffer, then the following problem will arise.
One problem is that memory access restriction may be needed, since the CPU must speed up its internal processings.
This memory access restriction, as described on pages 94 to 97 of xe2x80x9cComputer Architecture A Quantitative Approachxe2x80x9d, means that when a memory is accessed in words or long words, the addresses must be even numbers or multiples of 4. The standard unit to access a memory is bytes.
For example, when data is written in the frame buffer in long words, the address of the destination must be a multiple of 4. In other cases, writing is allowed only with a smaller size.
The first purpose of this invention is to reduce the size and price of the subject graphics computer, as well as to shorten the drawing time. Especially, it is to speed up the access to the frame buffer arranged in the main memory when drawing pixel data by making good use of the high speed access mode of the main memory comprising a DRAM, etc., although such a memory configuration has not been considered so far. (This corresponds to the 1st conventional technology.)
In the means to achieve the first purpose of this invention, the addresses of the same row in the general-purpose area in the main memory can be handled as continuous addresses from a CPU or DMAC, since registers and an address converter are provided. On the other hand, the addresses of the same row in the frame buffer are arranged two-dimensionally when viewing them from the CPU or DMAC. Thus, the pixels continued in the vertical direction can be accessed within the addresses of the same row. CPU programs and arithmetic operation data that are often continued one-dimensionally therefore can be stored in the general-purpose area, while graphics pixel data that is often continued two-dimensionally can be stored in the frame buffer so that accesses for both drawing and other purposes can be speeded up significantly.
In the means to achieve a 2nd purpose of this invention, either the method with which the drawing method control unit draws pixel data using the data stored in the data storage according to the coordinate values of the start and end points of the subject line, or the method to draw pixel data by computing the equation to compute the coordinate values of the subject line, can be selected to reduce the storage capacity and speed up the drawing of the line.
In the means to achieve a 3rd and other purposes of this invention, plural pixels can be expanded to multivalue data and processed for drawing concurrently by selecting the multivalue and mask patterns held beforehand in the multivalue pattern storage and the mask pattern storage according to the condition to expand binary data for extracted plural pixels to multivalue data and the target pixel data position. Accordingly, increasing of the number of steps in programs can be suppressed, speeding up the processings significantly.